1 ;THE COMPUTER CODE CONTAINED HEREIN IS THE SOLE PROPERTY OF PARALLAX
2 ;SOFTWARE CORPORATION ("PARALLAX"). PARALLAX, IN DISTRIBUTING THE CODE TO
3 ;END-USERS, AND SUBJECT TO ALL OF THE TERMS AND CONDITIONS HEREIN, GRANTS A
4 ;ROYALTY-FREE, PERPETUAL LICENSE TO SUCH END-USERS FOR USE BY SUCH END-USERS
5 ;IN USING, DISPLAYING, AND CREATING DERIVATIVE WORKS THEREOF, SO LONG AS
6 ;SUCH USE, DISPLAY OR CREATION IS FOR NON-COMMERCIAL, ROYALTY OR REVENUE
7 ;FREE PURPOSES. IN NO EVENT SHALL THE END-USER USE THE COMPUTER CODE
8 ;CONTAINED HEREIN FOR REVENUE-BEARING PURPOSES. THE END-USER UNDERSTANDS
9 ;AND AGREES TO THE TERMS HEREIN AND ACCEPTS THE SAME BY USE OF THIS FILE.
10 ;COPYRIGHT 1993-1998 PARALLAX SOFTWARE CORPORATION. ALL RIGHTS RESERVED.
12 ; $Source: /cvs/cvsroot/d2x/arch/dos_tweak.inc,v $
13 ; $Revision: 1.1.1.1 $
15 ; $Date: 2001-01-19 03:33:51 $
17 ; Parameters used by modex.asm to set various modex resolutions.
19 ; $Log: not supported by cvs2svn $
20 ; Revision 1.1.1.1 1999/06/14 21:58:45 donut
21 ; Import of d1x 1.37 source.
23 ; Revision 1.3 1993/11/16 11:28:09 john
24 ; *** empty log message ***
26 ; Revision 1.2 1993/10/15 16:23:18 john
29 ; Revision 1.1 1993/09/08 11:41:09 john
36 ; Mode X CRTC register tweaks for various resolutions
38 X320Y200 db 00 ; 0e3h ; dot clock
39 db 02 ; Number of CRTC Registers to update
40 dw 00014h ; turn off dword mode
41 dw 0e317h ; turn on byte mode
45 X320Y240 db 0e3h ; dot clock
46 db 10 ; Number of CRTC Registers to update
47 dw 00d06h ; vertical total
48 dw 03e07h ; overflow (bit 8 of vertical counts)
49 dw 04109h ; cell height (2 to double-scan)
50 dw 0ea10h ; v sync start
51 dw 0ac11h ; v sync end and protect cr0-cr7
52 dw 0df12h ; vertical displayed
53 dw 00014h ; turn off dword mode
54 dw 0e715h ; v blank start
55 dw 00616h ; v blank end
56 dw 0e317h ; turn on byte mode
60 X360Y200 db 0e7h ; dot clock
61 db 08 ; Number of CRTC Registers to update
62 dw 06b00h ; horz total
63 dw 05901h ; horz displayed
64 dw 05a02h ; start horz blanking
65 dw 08e03h ; end horz blanking
66 dw 05e04h ; start h sync
67 dw 08a05h ; end h sync
68 dw 00014h ; turn off dword mode
69 dw 0e317h ; turn on byte mode
74 X360Y240 db 0e7h ; dot clock
75 db 17 ; Number of CRTC Registers to update
76 dw 06b00h ; horz total
77 dw 05901h ; horz displayed
78 dw 05a02h ; start horz blanking
79 dw 08e03h ; end horz blanking
80 dw 05e04h ; start h sync
81 dw 08a05h ; end h sync
82 dw 00d06h ; vertical total
83 dw 03e07h ; overflow (bit 8 of vertical counts)
84 dw 04109h ; cell height (2 to double-scan)
85 dw 0ea10h ; v sync start
86 dw 0ac11h ; v sync end and protect cr0-cr7
87 dw 0df12h ; vertical displayed
89 dw 00014h ; turn off dword mode
90 dw 0e715h ; v blank start
91 dw 00616h ; v blank end
92 dw 0e317h ; turn on byte mode
98 dw 06e00h ; horz total
99 dw 05d01h ; horz displayed
100 dw 05e02h ; start horz blanking
101 dw 09103h ; end horz blanking
102 dw 06204h ; start h sync
103 dw 08f05h ; end h sync
104 dw 06206h ; vertical total
106 dw 06109h ; cell height
108 dw 03710h ; v sync start
109 dw 08911h ; v sync end and protect cr0-cr7
110 dw 03312h ; vertical displayed
112 dw 00014h ; turn off dword mode
113 dw 03c15h ; v blank start
114 dw 05c16h ; v blank end
115 dw 0eb17h ; turn on byte mode
120 X320Y400 db 0h ; dot clock
121 db 03 ; Number of CRTC Registers to update
122 dw 04009h ; cell height
123 dw 00014h ; turn off dword mode
124 dw 0e317h ; turn on byte mode
128 X320Y480 db 0e3h ; dotclock
129 db 10 ; Number of CRTC Registers to update
130 dw 00d06h ; vertical total
131 dw 03e07h ; overflow (bit 8 of vertical counts)
132 dw 04009h ; cell height (2 to double-scan)
133 dw 0ea10h ; v sync start
134 dw 0ac11h ; v sync end and protect cr0-cr7
135 dw 0df12h ; vertical displayed
136 dw 00014h ; turn off dword mode
137 dw 0e715h ; v blank start
138 dw 00616h ; v blank end
139 dw 0e317h ; turn on byte mode
143 X360Y400 db 0e7h ; dot clock
144 db 09 ; Number of CRTC Registers to update
145 dw 06b00h ; horz total
146 dw 05901h ; horz displayed
147 dw 05a02h ; start horz blanking
148 dw 08e03h ; end horz blanking
149 dw 05e04h ; start h sync
150 dw 08a05h ; end h sync
151 dw 04009h ; cell height
152 dw 00014h ; turn off dword mode
153 dw 0e317h ; turn on byte mode
159 dw 06b00h ; horz total
160 dw 05901h ; horz displayed
161 dw 05a02h ; start horz blanking
162 dw 08e03h ; end horz blanking
163 dw 05e04h ; start h sync
164 dw 08a05h ; end h sync
165 dw 00d06h ; vertical total
167 dw 04009h ; cell height
168 dw 0ea10h ; v sync start
169 dw 0ac11h ; v sync end and protect cr0-cr7
170 dw 0df12h ; vertical displayed
172 dw 00014h ; turn off dword mode
173 dw 0e715h ; v blank start
174 dw 00616h ; v blank end
175 dw 0e317h ; turn on byte mode
181 dw 06b00h ; horz total
182 dw 05901h ; horz displayed
183 dw 05a02h ; start horz blanking
184 dw 08e03h ; end horz blanking
185 dw 05e04h ; start h sync
186 dw 08a05h ; end h sync
187 dw 04009h ; cell height
188 dw 08810h ; v sync start
189 dw 08511h ; v sync end and protect cr0-cr7
190 dw 06712h ; vertical displayed
192 dw 00014h ; turn off dword mode
193 dw 06d15h ; v blank start
194 dw 0ba16h ; v blank end
195 dw 0e317h ; turn on byte mode
201 dw 06e00h ; horz total
202 dw 05d01h ; horz displayed
203 dw 05e02h ; start horz blanking
204 dw 09103h ; end horz blanking
205 dw 06204h ; start h sync
206 dw 08f05h ; end h sync
207 dw 06206h ; vertical total
211 dw 03710h ; v sync start
212 dw 08911h ; v sync end and protect cr0-cr7
213 dw 03312h ; vertical displayed
215 dw 00014h ; turn off dword mode
216 dw 03c15h ; v blank start
217 dw 05c16h ; v blank end
218 dw 0e317h ; turn on byte mode
224 dw 06e00h ; horz total
225 dw 05d01h ; horz displayed
226 dw 05e02h ; start horz blanking
227 dw 09103h ; end horz blanking
228 dw 06204h ; start h sync
229 dw 08f05h ; end h sync
230 dw 06206h ; vertical total
234 dw 03710h ; v sync start
235 dw 08911h ; v sync end and protect cr0-cr7
236 dw 03312h ; vertical displayed
238 dw 00014h ; turn off dword mode
239 dw 03c15h ; v blank start
240 dw 05c16h ; v blank end
241 dw 0e317h ; turn on byte mode
245 %define LAST_X_MODE 11
247 ModeTable dd X320Y200