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13 ; Readable descriptions of VGA ports.
20 %define MISC_OUTPUT 03c2h ;Miscellaneous Output register
21 %define MAP_MASK 02h ;index in SC of Map Mask register
22 %define READ_MAP 04h ;index in GC of the Read Map register
23 %define BIT_MASK 08h ;index in GC of Bit Mask register
25 %define SC_INDEX 3c4h ;Index register for sequencer ctrl.
26 %define SC_MAP_MASK 2 ;Number of map mask register
28 %define SC_INDEX 3c4h ;Index register for sequencer ctrl.
29 %define SC_MAP_MASK 2 ;Number of map mask register
30 %define SC_MEM_MODE 4 ;Number of memory mode register
32 %define GC_INDEX 3ceh ;Index register for graphics ctrl.
33 %define GC_READ_MAP 4 ;Number of read map register
34 %define GC_GRAPH_MODE 5 ;Number of graphics mode register
35 %define GC_MISCELL 6 ;Number of miscellaneous register
37 %define CRTC_INDEX 3d4h ;Index register for CRT controller
38 %define CC_MAX_SCAN 9 ;Number of maximum scan line reg.
39 %define CC_START_HI 0Ch ;Number of start address high register
40 %define CC_START_LO 0Dh ;Number of start address low register
41 %define CC_UNDERLINE 14h ;Number of underline register
42 %define CC_MODE_CTRL 17h ;Number of mode control register
43 %define CRTC_OFFSET 13h ; CRTC offset register index
45 %define DAC_WRITE_ADR 3C8h ;DAC write address
46 %define DAC_READ_ADR 3C7h ;DAC read address
47 %define DAC_DATA 3C9h ;DAC data register
49 %define VERT_RESCAN 3DAh ;Input status register #1